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DotN64/DotN64/DotN64.csproj

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Initial commit.
2017-08-23 08:27:36 +02:00
<?xml version="1.0" encoding="utf-8"?>
<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
<PropertyGroup>
<Configuration Condition=" '$(Configuration)' == '' ">Debug</Configuration>
<Platform Condition=" '$(Platform)' == '' ">AnyCPU</Platform>
<ProjectGuid>{3231B7B4-EFE7-469A-AD04-D75EDECE2AFE}</ProjectGuid>
Turn DotN64 into a library, reference it and SDL2 for the desktop project.
2018-06-11 19:51:06 +02:00
<OutputType>Library</OutputType>
Name change.
2017-10-09 08:21:31 +02:00
<RootNamespace>DotN64</RootNamespace>
<AssemblyName>DotN64</AssemblyName>
Changed target framework.
2017-10-30 10:08:44 +01:00
<TargetFrameworkVersion>v4.6.1</TargetFrameworkVersion>
CPU: refactored control flow and load/store methods, added new ops.
2018-06-09 17:40:52 +02:00
<SynchReleaseVersion>false</SynchReleaseVersion>
Initial commit.
2017-08-23 08:27:36 +02:00
</PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Debug|AnyCPU' ">
<DebugSymbols>true</DebugSymbols>
<DebugType>full</DebugType>
<Optimize>false</Optimize>
<OutputPath>bin\Debug</OutputPath>
<DefineConstants>DEBUG;</DefineConstants>
<WarningLevel>4</WarningLevel>
- Reduced memory allocation and CPU usage by not using LINQ, foreach in hot paths and unsafe writes instead of array copies. - 64-bit addressing in mapping entries instead of down-casting. - Fixed cartridge field length. - Adjusted ops.
2017-10-13 21:02:42 +02:00
<AllowUnsafeBlocks>true</AllowUnsafeBlocks>
Initial commit.
2017-08-23 08:27:36 +02:00
</PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Release|AnyCPU' ">
<Optimize>true</Optimize>
<OutputPath>bin\Release</OutputPath>
<WarningLevel>4</WarningLevel>
- Reduced memory allocation and CPU usage by not using LINQ, foreach in hot paths and unsafe writes instead of array copies. - 64-bit addressing in mapping entries instead of down-casting. - Fixed cartridge field length. - Adjusted ops.
2017-10-13 21:02:42 +02:00
<AllowUnsafeBlocks>true</AllowUnsafeBlocks>
Initial commit.
2017-08-23 08:27:36 +02:00
</PropertyGroup>
<ItemGroup>
<Reference Include="System" />
<Reference Include="System.Core" />
Huge changes (too lazy to separate). * VR4300.SystemControlUnit.StatusRegister.cs: Removed unneeded value. * VR4300.SystemControlUnit.cs: Renamed method. * VR4300.Instruction.cs: Refactored instruction contents. Now individual parts can be written to as well. It is also possible to strip an instruction to its bare opcode identifier, or even create one from a specified opcode, so this can be used as a key in a dictionary of operations. A basic ToString implementation displays the opcode of the instruction. * VR4300.OpCode.cs: * VR4300.RegImmOpCode.cs: * VR4300.SpecialOpCode.cs: Added opcodes. * VR4300.cs: Unified operations into a single dictionary thanks to the instruction refactoring. Added ops: JAL, SLTI, XORI, BLEZL, SB, LBU, SLT, BGEZL. * Debugger.Command.cs: Basic display of what the command is about. * Debugger.InstructionFormat.cs: First pass of the formatter. * Debugger.cs: Proper disassembly of instructions. Stepping also displays the contents of registers. ~Infinite~ count argument for stepping/disassembling. Refactored instruction fetch into using the CPU's SysAD bus (no need to manually access the N64's memory maps). * DotN64.csproj: * RealityCoprocessor.SignalProcessor.StatusRegister.cs: * RealityCoprocessor.DisplayProcessor.StatusRegister.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigIndex.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigRegister.cs: * MappingEntryExtensions.cs: Saves some typing. * BitHelper.cs: Reusable methods. * Nintendo64.cs: More memory maps. * Program.cs: Minor changes. * RealityCoprocessor.Interface.cs: * RealityCoprocessor.AudioInterface.cs: * RealityCoprocessor.VideoInterface.cs: * RealityCoprocessor.SerialInterface.cs: Simplified mapping accesses. * RealityCoprocessor.DisplayProcessor.cs: Added an actual register. Simplified mapping accesses. * RealityCoprocessor.MIPSInterface.cs: Added dummy version register read. Simplified mapping accesses. * RealityCoprocessor.PeripheralInterface.cs: Basic DMA. Simplified mapping accesses. * RealityCoprocessor.RDRAMInterface.cs: Removed constants that get set in the boot process. Added RDRAM registers. Simplified mapping accesses. * RealityCoprocessor.SignalProcessor.cs: Better types for existing registers and handle status writes. Simplified mapping accesses.
2017-12-11 15:04:53 +01:00
<Reference Include="System.Numerics" />
Initial commit.
2017-08-23 08:27:36 +02:00
</ItemGroup>
<ItemGroup>
Added some hardware and documentation.
2017-08-28 08:53:48 +02:00
<Compile Include="Nintendo64.cs" />
<Compile Include="Cartridge.cs" />
Directory structure.
2017-09-03 09:33:27 +02:00
<Compile Include="RCP\RealityCoprocessor.cs" />
Refactoring: - Reuse local var when mapping memory. - Give the memory maps to the CPU instead of the console.
2017-10-03 02:14:41 +02:00
<Compile Include="MappingEntry.cs" />
- Reduced memory allocation and CPU usage by not using LINQ, foreach in hot paths and unsafe writes instead of array copies. - 64-bit addressing in mapping entries instead of down-casting. - Fixed cartridge field length. - Adjusted ops.
2017-10-13 21:02:42 +02:00
<Compile Include="Extensions\MappingEntryExtensions.cs" />
Moved RCP interfaces inside itself.
2017-11-04 15:24:26 +01:00
<Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.cs" />
<Compile Include="RCP\SP\RealityCoprocessor.SignalProcessor.cs" />
<Compile Include="RCP\RealityCoprocessor.Interface.cs" />
<Compile Include="RCP\AI\RealityCoprocessor.AudioInterface.cs" />
<Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.cs" />
<Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.InitModeRegister.cs" />
PI.
2017-12-19 20:24:14 +01:00
<Compile Include="RCP\PI\RealityCoprocessor.ParallelInterface.cs" />
<Compile Include="RCP\PI\RealityCoprocessor.ParallelInterface.Domain.cs" />
Exception processing, interrupts, registers.
2018-01-01 18:01:59 +01:00
<Compile Include="RCP\PI\RealityCoprocessor.ParallelInterface.Statuses.cs" />
Moved RCP interfaces inside itself.
2017-11-04 15:24:26 +01:00
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.cs" />
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.ConfigRegister.cs" />
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.ModeRegister.cs" />
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.RefreshRegister.cs" />
<Compile Include="RCP\SI\RealityCoprocessor.SerialInterface.cs" />
Refactored flags and renamed registers.
2018-05-11 12:57:20 +02:00
<Compile Include="RCP\SI\RealityCoprocessor.SerialInterface.Statuses.cs" />
Moved RCP interfaces inside itself.
2017-11-04 15:24:26 +01:00
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.HorizontalVideoRegister.cs" />
Moved the CPU in its own folder.
2017-11-04 16:28:09 +01:00
<Compile Include="CPU\VR4300\VR4300.cs" />
<Compile Include="CPU\VR4300\VR4300.GPRIndex.cs" />
<Compile Include="CPU\VR4300\VR4300.Instruction.cs" />
<Compile Include="CPU\VR4300\VR4300.OpCode.cs" />
<Compile Include="CPU\VR4300\VR4300.RegImmOpCode.cs" />
<Compile Include="CPU\VR4300\VR4300.SpecialOpCode.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.ConfigRegister.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.Register.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.RegisterIndex.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.StatusRegister.cs" />
A debugger appeared.
2017-11-16 08:33:04 +01:00
<Compile Include="Diagnostics\Debugger.cs" />
<Compile Include="Diagnostics\Debugger.Status.cs" />
<Compile Include="Diagnostics\Debugger.Command.cs" />
Huge changes (too lazy to separate). * VR4300.SystemControlUnit.StatusRegister.cs: Removed unneeded value. * VR4300.SystemControlUnit.cs: Renamed method. * VR4300.Instruction.cs: Refactored instruction contents. Now individual parts can be written to as well. It is also possible to strip an instruction to its bare opcode identifier, or even create one from a specified opcode, so this can be used as a key in a dictionary of operations. A basic ToString implementation displays the opcode of the instruction. * VR4300.OpCode.cs: * VR4300.RegImmOpCode.cs: * VR4300.SpecialOpCode.cs: Added opcodes. * VR4300.cs: Unified operations into a single dictionary thanks to the instruction refactoring. Added ops: JAL, SLTI, XORI, BLEZL, SB, LBU, SLT, BGEZL. * Debugger.Command.cs: Basic display of what the command is about. * Debugger.InstructionFormat.cs: First pass of the formatter. * Debugger.cs: Proper disassembly of instructions. Stepping also displays the contents of registers. ~Infinite~ count argument for stepping/disassembling. Refactored instruction fetch into using the CPU's SysAD bus (no need to manually access the N64's memory maps). * DotN64.csproj: * RealityCoprocessor.SignalProcessor.StatusRegister.cs: * RealityCoprocessor.DisplayProcessor.StatusRegister.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigIndex.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigRegister.cs: * MappingEntryExtensions.cs: Saves some typing. * BitHelper.cs: Reusable methods. * Nintendo64.cs: More memory maps. * Program.cs: Minor changes. * RealityCoprocessor.Interface.cs: * RealityCoprocessor.AudioInterface.cs: * RealityCoprocessor.VideoInterface.cs: * RealityCoprocessor.SerialInterface.cs: Simplified mapping accesses. * RealityCoprocessor.DisplayProcessor.cs: Added an actual register. Simplified mapping accesses. * RealityCoprocessor.MIPSInterface.cs: Added dummy version register read. Simplified mapping accesses. * RealityCoprocessor.PeripheralInterface.cs: Basic DMA. Simplified mapping accesses. * RealityCoprocessor.RDRAMInterface.cs: Removed constants that get set in the boot process. Added RDRAM registers. Simplified mapping accesses. * RealityCoprocessor.SignalProcessor.cs: Better types for existing registers and handle status writes. Simplified mapping accesses.
2017-12-11 15:04:53 +01:00
<Compile Include="Diagnostics\Debugger.InstructionFormat.cs" />
<Compile Include="Helpers\BitHelper.cs" />
Refactored flags and renamed registers.
2018-05-11 12:57:20 +02:00
<Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.Statuses.cs" />
Exception processing, interrupts, registers.
2018-01-01 18:01:59 +01:00
<Compile Include="RCP\SP\RealityCoprocessor.SignalProcessor.Statuses.cs" />
* VR4300.Exceptions.cs: Added a custom exception. * VR4300.cs: Fixed SLLV/SRLV not downcasting a register source. * Debugger.InstructionFormat.cs: Added some more formatting exceptions. * Program.cs: * Cartridge.cs: * DotN64.csproj: * RDRAM.cs: * PeripheralInterface.cs: * RDRAM.ConfigIndex.cs: * RDRAM.ConfigRegister.cs: * PeripheralInterface.CIC.cs: * PeripheralInterface.CICStatus.cs: * PeripheralInterface.DeviceState.cs: * RealityCoprocessor.RDRAMInterface.cs: * RealityCoprocessor.PeripheralInterface.cs: * Nintendo64.cs: Added peripherals and rewiring. * RealityCoprocessor.PeripheralInterface.StatusRegister.cs: Moved write register constants to an enum, too. * BitHelper.cs: Better method signatures.
2017-12-18 08:50:25 +01:00
<Compile Include="CPU\VR4300\VR4300.Exceptions.cs" />
<Compile Include="PIF\PeripheralInterface.cs" />
<Compile Include="PIF\PeripheralInterface.CICStatus.cs" />
<Compile Include="PIF\PeripheralInterface.DeviceState.cs" />
<Compile Include="RDRAM\RDRAM.cs" />
<Compile Include="RDRAM\RDRAM.ConfigIndex.cs" />
<Compile Include="RDRAM\RDRAM.ConfigRegister.cs" />
<Compile Include="PIF\PeripheralInterface.CIC.cs" />
Exception processing, interrupts, registers.
2018-01-01 18:01:59 +01:00
<Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.Interrupts.cs" />
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.CauseRegister.cs" />
<Compile Include="CPU\VR4300\VR4300.ExceptionProcessing.cs" />
Coprocessor, debugger, and exception stuff. * VR4300.SystemControlUnit.cs: Implemented coprocessor operations. * VR4300.ExceptionProcessing.cs: More exceptions. * VR4300.Exceptions.cs: Support coprocessor ops. * DotN64.csproj: * VR4300.ICoprocessor.cs: * VR4300.Instruction.cs: Implemented IEquatable to avoid boxing in dictionary key comparisons. Added COPz for coprocessor ops. * VR4300.OpCode.cs: Proper coprocessor ops. * VR4300.cs: Added coprocessor unit support. * Debugger.InstructionFormat.cs: (Slightly) take into account coprocessor ops. * Debugger.cs: Using an instruction cursor to avoid confusion. Fixed a case where the debugger would run a cycle despite exiting it. Coprocessor ops aren't properly disassembled.
2018-01-17 10:34:02 +01:00
<Compile Include="CPU\VR4300\VR4300.ICoprocessor.cs" />
Moved CP0.OpCode enum.
2018-01-17 17:30:01 +01:00
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.OpCode.cs" />
- Added the FPU. - Added an exception handler for the FPU. - Added constants for cartridges and fixed header properties. - PIF HLE determines the console region for the saved register that's used by the OS. - The disassembler shows CP1 opcodes.
2018-01-23 18:46:12 +01:00
<Compile Include="CPU\VR4300\CP1\VR4300.FloatingPointUnit.cs" />
<Compile Include="PIF\PeripheralInterface.TVType.cs" />
<Compile Include="Cartridge.MediaFormat.cs" />
Renames.
2018-12-11 20:47:19 +01:00
<Compile Include="Cartridge.RegionCode.cs" />
- Added the FPU. - Added an exception handler for the FPU. - Added constants for cartridges and fixed header properties. - PIF HLE determines the console region for the saved register that's used by the OS. - The disassembler shows CP1 opcodes.
2018-01-23 18:46:12 +01:00
<Compile Include="CPU\VR4300\CP1\VR4300.FloatingPointUnit.OpCode.cs" />
<Compile Include="CPU\VR4300\CP1\VR4300.FloatingPointUnit.Register.cs" />
<Compile Include="CPU\VR4300\CP1\VR4300.FloatingPointUnit.ImplementationRevisionRegister.cs" />
<Compile Include="CPU\VR4300\CP1\VR4300.FloatingPointUnit.ControlStatusRegister.cs" />
More ops.
2018-01-24 03:06:39 +01:00
<Compile Include="CPU\VR4300\CP0\VR4300.SystemControlUnit.FunctOpCode.cs" />
CPU: refactored control flow and load/store methods, added new ops.
2018-06-09 17:40:52 +02:00
<Compile Include="CPU\VR4300\VR4300.AccessSize.cs" />
VI registers.
2018-06-16 13:59:56 +02:00
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.ControlRegister.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.TimingRegister.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.HorizontalSyncRegister.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.VerticalVideoRegister.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.VerticalBurstRegister.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.ScaleRegister.cs" />
First pass on video output. - Added SDL video output. - Send VI interrupts when the currently scanned line hits the interrupt register's. - Added some program options related to video.
2018-06-27 16:12:46 +02:00
<Compile Include="IVideoOutput.cs" />
<Compile Include="VideoFrame.cs" />
<Compile Include="Switch.cs" />
Hello, Angrylion RDP.
2018-11-29 05:26:46 +01:00
<Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.Angrylion.cs" />
Name the interrupt pins.
2018-12-11 19:36:26 +01:00
<Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.InterruptPins.cs" />
Set the MI version register to RCP v2.0.
2018-12-21 23:32:17 +01:00
<Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.VersionRegister.cs" />
Added some hardware and documentation.
2017-08-28 08:53:48 +02:00
</ItemGroup>
<ItemGroup>
Directory structure.
2017-09-03 09:33:27 +02:00
<Folder Include="CPU\" />
<Folder Include="RCP\" />
- Reduced memory allocation and CPU usage by not using LINQ, foreach in hot paths and unsafe writes instead of array copies. - 64-bit addressing in mapping entries instead of down-casting. - Fixed cartridge field length. - Adjusted ops.
2017-10-13 21:02:42 +02:00
<Folder Include="Extensions\" />
Moved RCP interfaces inside itself.
2017-11-04 15:24:26 +01:00
<Folder Include="RCP\AI\" />
<Folder Include="RCP\MI\" />
<Folder Include="RCP\PI\" />
<Folder Include="RCP\RI\" />
<Folder Include="RCP\SI\" />
<Folder Include="RCP\VI\" />
<Folder Include="RCP\DP\" />
<Folder Include="RCP\SP\" />
Moved the CPU in its own folder.
2017-11-04 16:28:09 +01:00
<Folder Include="CPU\VR4300\" />
<Folder Include="CPU\VR4300\CP0\" />
A debugger appeared.
2017-11-16 08:33:04 +01:00
<Folder Include="Diagnostics\" />
Huge changes (too lazy to separate). * VR4300.SystemControlUnit.StatusRegister.cs: Removed unneeded value. * VR4300.SystemControlUnit.cs: Renamed method. * VR4300.Instruction.cs: Refactored instruction contents. Now individual parts can be written to as well. It is also possible to strip an instruction to its bare opcode identifier, or even create one from a specified opcode, so this can be used as a key in a dictionary of operations. A basic ToString implementation displays the opcode of the instruction. * VR4300.OpCode.cs: * VR4300.RegImmOpCode.cs: * VR4300.SpecialOpCode.cs: Added opcodes. * VR4300.cs: Unified operations into a single dictionary thanks to the instruction refactoring. Added ops: JAL, SLTI, XORI, BLEZL, SB, LBU, SLT, BGEZL. * Debugger.Command.cs: Basic display of what the command is about. * Debugger.InstructionFormat.cs: First pass of the formatter. * Debugger.cs: Proper disassembly of instructions. Stepping also displays the contents of registers. ~Infinite~ count argument for stepping/disassembling. Refactored instruction fetch into using the CPU's SysAD bus (no need to manually access the N64's memory maps). * DotN64.csproj: * RealityCoprocessor.SignalProcessor.StatusRegister.cs: * RealityCoprocessor.DisplayProcessor.StatusRegister.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigIndex.cs: * RealityCoprocessor.RDRAMInterface.RDRAMConfigRegister.cs: * MappingEntryExtensions.cs: Saves some typing. * BitHelper.cs: Reusable methods. * Nintendo64.cs: More memory maps. * Program.cs: Minor changes. * RealityCoprocessor.Interface.cs: * RealityCoprocessor.AudioInterface.cs: * RealityCoprocessor.VideoInterface.cs: * RealityCoprocessor.SerialInterface.cs: Simplified mapping accesses. * RealityCoprocessor.DisplayProcessor.cs: Added an actual register. Simplified mapping accesses. * RealityCoprocessor.MIPSInterface.cs: Added dummy version register read. Simplified mapping accesses. * RealityCoprocessor.PeripheralInterface.cs: Basic DMA. Simplified mapping accesses. * RealityCoprocessor.RDRAMInterface.cs: Removed constants that get set in the boot process. Added RDRAM registers. Simplified mapping accesses. * RealityCoprocessor.SignalProcessor.cs: Better types for existing registers and handle status writes. Simplified mapping accesses.
2017-12-11 15:04:53 +01:00
<Folder Include="Helpers\" />
* VR4300.Exceptions.cs: Added a custom exception. * VR4300.cs: Fixed SLLV/SRLV not downcasting a register source. * Debugger.InstructionFormat.cs: Added some more formatting exceptions. * Program.cs: * Cartridge.cs: * DotN64.csproj: * RDRAM.cs: * PeripheralInterface.cs: * RDRAM.ConfigIndex.cs: * RDRAM.ConfigRegister.cs: * PeripheralInterface.CIC.cs: * PeripheralInterface.CICStatus.cs: * PeripheralInterface.DeviceState.cs: * RealityCoprocessor.RDRAMInterface.cs: * RealityCoprocessor.PeripheralInterface.cs: * Nintendo64.cs: Added peripherals and rewiring. * RealityCoprocessor.PeripheralInterface.StatusRegister.cs: Moved write register constants to an enum, too. * BitHelper.cs: Better method signatures.
2017-12-18 08:50:25 +01:00
<Folder Include="PIF\" />
<Folder Include="RDRAM\" />
- Added the FPU. - Added an exception handler for the FPU. - Added constants for cartridges and fixed header properties. - PIF HLE determines the console region for the saved register that's used by the OS. - The disassembler shows CP1 opcodes.
2018-01-23 18:46:12 +01:00
<Folder Include="CPU\VR4300\CP1\" />
Initial commit.
2017-08-23 08:27:36 +02:00
</ItemGroup>
<Import Project="$(MSBuildBinPath)\Microsoft.CSharp.targets" />
</Project>