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Refactored flags and renamed registers.

master
Nabile Rahmani 2018-05-11 12:57:20 +02:00
parent ecab40e39e
commit be7b7c9827
7 changed files with 66 additions and 94 deletions
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4
DotN64/DotN64.csproj
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@ -50,7 +50,7 @@
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.ModeRegister.cs" />
<Compile Include="RCP\RI\RealityCoprocessor.RDRAMInterface.RefreshRegister.cs" />
<Compile Include="RCP\SI\RealityCoprocessor.SerialInterface.cs" />
<Compile Include="RCP\SI\RealityCoprocessor.SerialInterface.StatusRegister.cs" />
<Compile Include="RCP\SI\RealityCoprocessor.SerialInterface.Statuses.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.cs" />
<Compile Include="RCP\VI\RealityCoprocessor.VideoInterface.HorizontalVideoRegister.cs" />
<Compile Include="CPU\VR4300\VR4300.cs" />
@ -69,7 +69,7 @@
<Compile Include="Diagnostics\Debugger.Command.cs" />
<Compile Include="Diagnostics\Debugger.InstructionFormat.cs" />
<Compile Include="Helpers\BitHelper.cs" />
<Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.StatusRegister.cs" />
<Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.Statuses.cs" />
<Compile Include="RCP\SP\RealityCoprocessor.SignalProcessor.Statuses.cs" />
<Compile Include="CPU\VR4300\VR4300.Exceptions.cs" />
<Compile Include="PIF\PeripheralInterface.cs" />

2
DotN64/RCP/DP/RealityCoprocessor.DisplayProcessor.StatusRegister.cs → DotN64/RCP/DP/RealityCoprocessor.DisplayProcessor.Statuses.cs
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@ -5,7 +5,7 @@
public partial class DisplayProcessor
{
[System.Flags]
public enum StatusRegister : ushort
public enum Statuses : ushort
{
XBusDMemDMA = 1 << 0,
Freeze = 1 << 1,

2
DotN64/RCP/DP/RealityCoprocessor.DisplayProcessor.cs
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@ -13,7 +13,7 @@ namespace DotN64.RCP
#region Properties
public IReadOnlyList<MappingEntry> MemoryMaps { get; }
public StatusRegister Status { get; set; }
public Statuses Status { get; set; }
#endregion
#region Constructors

56
DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs
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@ -9,7 +9,7 @@ namespace DotN64.RCP
public partial class MIPSInterface : Interface
{
#region Fields
private static readonly byte interruptPin = 1 << 0;
private const byte InterruptPin = 1 << 0;
#endregion
#region Properties
@ -72,41 +72,35 @@ namespace DotN64.RCP
{
var mask = (InterruptMaskWrites)v;
if ((mask & InterruptMaskWrites.ClearSP) != 0)
InterruptMask &= ~Interrupts.SP;
void Clear(InterruptMaskWrites clearMask, Interrupts interrupt)
{
if ((mask & clearMask) != 0)
InterruptMask &= ~interrupt;
}
if ((mask & InterruptMaskWrites.SetSP) != 0)
InterruptMask |= Interrupts.SP;
void Set(InterruptMaskWrites setMask, Interrupts interrupt)
{
if ((mask & setMask) != 0)
InterruptMask |= interrupt;
}
if ((mask & InterruptMaskWrites.ClearSI) != 0)
InterruptMask &= ~Interrupts.SI;
Clear(InterruptMaskWrites.ClearSP, Interrupts.SP);
Set(InterruptMaskWrites.SetSP, Interrupts.SP);
if ((mask & InterruptMaskWrites.SetSI) != 0)
InterruptMask |= Interrupts.SI;
Clear(InterruptMaskWrites.ClearSI, Interrupts.SI);
Set(InterruptMaskWrites.SetSI, Interrupts.SI);
if ((mask & InterruptMaskWrites.ClearAI) != 0)
InterruptMask &= ~Interrupts.AI;
Clear(InterruptMaskWrites.ClearAI, Interrupts.AI);
Set(InterruptMaskWrites.SetAI, Interrupts.AI);
if ((mask & InterruptMaskWrites.SetAI) != 0)
InterruptMask |= Interrupts.AI;
Clear(InterruptMaskWrites.ClearVI, Interrupts.VI);
Set(InterruptMaskWrites.SetVI, Interrupts.VI);
if ((mask & InterruptMaskWrites.ClearVI) != 0)
InterruptMask &= ~Interrupts.VI;
Clear(InterruptMaskWrites.ClearPI, Interrupts.PI);
Set(InterruptMaskWrites.SetPI, Interrupts.PI);
if ((mask & InterruptMaskWrites.SetVI) != 0)
InterruptMask |= Interrupts.VI;
if ((mask & InterruptMaskWrites.ClearPI) != 0)
InterruptMask &= ~Interrupts.PI;
if ((mask & InterruptMaskWrites.SetPI) != 0)
InterruptMask |= Interrupts.PI;
if ((mask & InterruptMaskWrites.ClearDP) != 0)
InterruptMask &= ~Interrupts.DP;
if ((mask & InterruptMaskWrites.SetDP) != 0)
InterruptMask |= Interrupts.DP;
Clear(InterruptMaskWrites.ClearDP, Interrupts.DP);
Set(InterruptMaskWrites.SetDP, Interrupts.DP);
UpdateInterrupt();
}
@ -119,9 +113,9 @@ namespace DotN64.RCP
private void UpdateInterrupt()
{
if ((Interrupt & InterruptMask) != 0)
CPU.Int |= interruptPin;
CPU.Int |= InterruptPin;
else
CPU.Int &= (byte)~interruptPin;
CPU.Int &= unchecked((byte)~InterruptPin);
}
#endregion
}

2
DotN64/RCP/SI/RealityCoprocessor.SerialInterface.StatusRegister.cs → DotN64/RCP/SI/RealityCoprocessor.SerialInterface.Statuses.cs
View File

@ -5,7 +5,7 @@
public partial class SerialInterface
{
[System.Flags]
public enum StatusRegister
public enum Statuses
{
DMABusy = 1 << 0,
IOReadBusy = 1 << 1,

4
DotN64/RCP/SI/RealityCoprocessor.SerialInterface.cs
View File

@ -5,7 +5,7 @@
public partial class SerialInterface : Interface
{
#region Properties
public StatusRegister Status { get; set; }
public Statuses Status { get; set; }
#endregion
#region Constructors
@ -17,7 +17,7 @@
new MappingEntry(0x04800018, 0x0480001B) // SI status.
{
Read = o => (uint)Status,
Write = (o, v) => Status &= ~StatusRegister.Interrupt
Write = (o, v) => Status &= ~Statuses.Interrupt
}
};
}

90
DotN64/RCP/SP/RealityCoprocessor.SignalProcessor.cs
View File

@ -54,14 +54,22 @@ namespace DotN64.RCP
{
var status = (StatusWrites)v;
if ((status & StatusWrites.ClearHalt) != 0)
Status &= ~Statuses.Halt;
void Clear(StatusWrites clearMask, Statuses value)
{
if ((status & clearMask) != 0)
Status &= ~value;
}
if ((status & StatusWrites.SetHalt) != 0)
Status |= Statuses.Halt;
void Set(StatusWrites setMask, Statuses value)
{
if ((status & setMask) != 0)
Status |= value;
}
if ((status & StatusWrites.ClearBroke) != 0)
Status &= ~Statuses.Broke;
Clear(StatusWrites.ClearHalt, Statuses.Halt);
Set(StatusWrites.SetHalt, Statuses.Halt);
Clear(StatusWrites.ClearBroke, Statuses.Broke);
if ((status & StatusWrites.ClearInterrupt) != 0)
rcp.MI.Interrupt &= ~MIPSInterface.Interrupts.SP;
@ -69,65 +77,35 @@ namespace DotN64.RCP
if ((status & StatusWrites.SetInterrupt) != 0)
rcp.MI.Interrupt |= MIPSInterface.Interrupts.SP;
if ((status & StatusWrites.ClearSingleStep) != 0)
Status &= ~Statuses.SingleStep;
Clear(StatusWrites.ClearSingleStep, Statuses.SingleStep);
Set(StatusWrites.SetSingleStep, Statuses.SingleStep);
if ((status & StatusWrites.SetSingleStep) != 0)
Status |= Statuses.SingleStep;
Clear(StatusWrites.ClearInterruptOnBreak, Statuses.InterruptOnBreak);
Set(StatusWrites.SetInterruptOnBreak, Statuses.InterruptOnBreak);
if ((status & StatusWrites.ClearInterruptOnBreak) != 0)
Status &= ~Statuses.InterruptOnBreak;
Clear(StatusWrites.ClearSignal0, Statuses.Signal0);
Set(StatusWrites.SetSignal0, Statuses.Signal0);
if ((status & StatusWrites.SetInterruptOnBreak) != 0)
Status |= Statuses.InterruptOnBreak;
Clear(StatusWrites.ClearSignal1, Statuses.Signal1);
Set(StatusWrites.SetSignal1, Statuses.Signal1);
if ((status & StatusWrites.ClearSignal0) != 0)
Status &= ~Statuses.Signal0;
Clear(StatusWrites.ClearSignal2, Statuses.Signal2);
Set(StatusWrites.SetSignal2, Statuses.Signal2);
if ((status & StatusWrites.SetSignal0) != 0)
Status |= Statuses.Signal0;
Clear(StatusWrites.ClearSignal3, Statuses.Signal3);
Set(StatusWrites.SetSignal3, Statuses.Signal3);
if ((status & StatusWrites.ClearSignal1) != 0)
Status &= ~Statuses.Signal1;
Clear(StatusWrites.ClearSignal4, Statuses.Signal4);
Set(StatusWrites.SetSignal4, Statuses.Signal4);
if ((status & StatusWrites.SetSignal1) != 0)
Status |= Statuses.Signal1;
Clear(StatusWrites.ClearSignal5, Statuses.Signal5);
Set(StatusWrites.SetSignal5, Statuses.Signal5);
if ((status & StatusWrites.ClearSignal2) != 0)
Status &= ~Statuses.Signal2;
Clear(StatusWrites.ClearSignal6, Statuses.Signal6);
Set(StatusWrites.SetSignal6, Statuses.Signal6);
if ((status & StatusWrites.SetSignal2) != 0)
Status |= Statuses.Signal2;
if ((status & StatusWrites.ClearSignal3) != 0)
Status &= ~Statuses.Signal3;
if ((status & StatusWrites.SetSignal3) != 0)
Status |= Statuses.Signal3;
if ((status & StatusWrites.ClearSignal4) != 0)
Status &= ~Statuses.Signal4;
if ((status & StatusWrites.SetSignal4) != 0)
Status |= Statuses.Signal4;
if ((status & StatusWrites.ClearSignal5) != 0)
Status &= ~Statuses.Signal5;
if ((status & StatusWrites.SetSignal5) != 0)
Status |= Statuses.Signal5;
if ((status & StatusWrites.ClearSignal6) != 0)
Status &= ~Statuses.Signal6;
if ((status & StatusWrites.SetSignal6) != 0)
Status |= Statuses.Signal6;
if ((status & StatusWrites.ClearSignal7) != 0)
Status &= ~Statuses.Signal7;
if ((status & StatusWrites.SetSignal7) != 0)
Status |= Statuses.Signal7;
Clear(StatusWrites.ClearSignal7, Statuses.Signal7);
Set(StatusWrites.SetSignal7, Statuses.Signal7);
}
},
new MappingEntry(0x04040018, 0x0404001B) // SP DMA busy.