Nabile Rahmani a4d06cef67 Handle special cases for CP0 register writes. ... - The timer interrupt is cleared on writes to the Compare register (see: #6.3.4). - Only software interrupt bits are writable into the Cause register (see: #6.3.6).		2018-12-24 21:38:18 +01:00
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VR4300.SystemControlUnit.CauseRegister.cs	Handle special cases for CP0 register writes.	2018-12-24 21:38:18 +01:00
VR4300.SystemControlUnit.ConfigRegister.cs	Replaced CP0 register index abstract property by a readonly field.	2018-06-09 18:17:06 +02:00
VR4300.SystemControlUnit.FunctOpCode.cs	Added ops.	2018-01-24 17:21:08 +01:00
VR4300.SystemControlUnit.OpCode.cs	More ops.	2018-01-24 03:06:39 +01:00
VR4300.SystemControlUnit.Register.cs	Replaced CP0 register index abstract property by a readonly field.	2018-06-09 18:17:06 +02:00
VR4300.SystemControlUnit.RegisterIndex.cs	Moved the CPU in its own folder.	2017-11-04 16:28:09 +01:00
VR4300.SystemControlUnit.StatusRegister.cs	The CPU is in kernel mode when EXL or ERL is on.	2018-12-22 00:28:05 +01:00
VR4300.SystemControlUnit.cs	Handle special cases for CP0 register writes.	2018-12-24 21:38:18 +01:00