Nabile Rahmani
a4d06cef67
- The timer interrupt is cleared on writes to the Compare register (see: #6.3.4). - Only software interrupt bits are writable into the Cause register (see: #6.3.6). |
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CP0 | ||
CP1 | ||
VR4300.AccessSize.cs | ||
VR4300.ExceptionProcessing.cs | ||
VR4300.Exceptions.cs | ||
VR4300.GPRIndex.cs | ||
VR4300.ICoprocessor.cs | ||
VR4300.Instruction.cs | ||
VR4300.OpCode.cs | ||
VR4300.RegImmOpCode.cs | ||
VR4300.SpecialOpCode.cs | ||
VR4300.cs |