Commit Graph

4 Commits (master)

Author SHA1 Message Date
Nabile Rahmani 34dfe21c05 Handle cartridge swap events by updating the memory map. Reduces branching and calls. 2018-06-27 16:08:45 +02:00
Nabile Rahmani 1800179515 - Added the FPU.
- Added an exception handler for the FPU.
- Added constants for cartridges and fixed header properties.
- PIF HLE determines the console region for the saved register that's used by the OS.
- The disassembler shows CP1 opcodes.
2018-01-23 18:46:12 +01:00
Nabile Rahmani 17dbe71cef * VR4300.Exceptions.cs: Added a custom exception.
* VR4300.cs: Fixed SLLV/SRLV not downcasting a register source.

* Debugger.InstructionFormat.cs: Added some more formatting
  exceptions.

* Program.cs:
* Cartridge.cs:
* DotN64.csproj:
* RDRAM.cs:
* PeripheralInterface.cs:
* RDRAM.ConfigIndex.cs:
* RDRAM.ConfigRegister.cs:
* PeripheralInterface.CIC.cs:
* PeripheralInterface.CICStatus.cs:
* PeripheralInterface.DeviceState.cs:
* RealityCoprocessor.RDRAMInterface.cs:
* RealityCoprocessor.PeripheralInterface.cs:

* Nintendo64.cs: Added peripherals and rewiring.

* RealityCoprocessor.PeripheralInterface.StatusRegister.cs: Moved
  write register constants to an enum, too.

* BitHelper.cs: Better method signatures.
2017-12-18 08:50:25 +01:00
Nabile Rahmani 23b06e69b5 Huge changes (too lazy to separate).
* VR4300.SystemControlUnit.StatusRegister.cs: Removed unneeded
  value.

* VR4300.SystemControlUnit.cs: Renamed method.

* VR4300.Instruction.cs: Refactored instruction contents. Now
  individual parts can be written to as well.
It is also possible to strip an instruction to its bare opcode
  identifier, or even create one from a specified opcode, so this can
  be used as a key in a dictionary of operations.
A basic ToString implementation displays the opcode of the
  instruction.

* VR4300.OpCode.cs:
* VR4300.RegImmOpCode.cs:
* VR4300.SpecialOpCode.cs: Added opcodes.

* VR4300.cs: Unified operations into a single dictionary thanks to the
  instruction refactoring.
Added ops: JAL, SLTI, XORI, BLEZL, SB, LBU, SLT, BGEZL.

* Debugger.Command.cs: Basic display of what the command is about.

* Debugger.InstructionFormat.cs: First pass of the formatter.

* Debugger.cs: Proper disassembly of instructions. Stepping also
  displays the contents of registers.
~Infinite~ count argument for stepping/disassembling.
Refactored instruction fetch into using the CPU's SysAD bus (no need
  to manually access the N64's memory maps).

* DotN64.csproj:
* RealityCoprocessor.SignalProcessor.StatusRegister.cs:
* RealityCoprocessor.DisplayProcessor.StatusRegister.cs:
* RealityCoprocessor.RDRAMInterface.RDRAMConfigIndex.cs:
* RealityCoprocessor.RDRAMInterface.RDRAMConfigRegister.cs:

* MappingEntryExtensions.cs: Saves some typing.

* BitHelper.cs: Reusable methods.

* Nintendo64.cs: More memory maps.

* Program.cs: Minor changes.

* RealityCoprocessor.Interface.cs:
* RealityCoprocessor.AudioInterface.cs:
* RealityCoprocessor.VideoInterface.cs:
* RealityCoprocessor.SerialInterface.cs: Simplified mapping accesses.

* RealityCoprocessor.DisplayProcessor.cs: Added an actual register.
Simplified mapping accesses.

* RealityCoprocessor.MIPSInterface.cs: Added dummy version register
  read.
Simplified mapping accesses.

* RealityCoprocessor.PeripheralInterface.cs: Basic DMA.
Simplified mapping accesses.

* RealityCoprocessor.RDRAMInterface.cs: Removed constants that get set
  in the boot process.
Added RDRAM registers.
Simplified mapping accesses.

* RealityCoprocessor.SignalProcessor.cs: Better types for existing
  registers and handle status writes.
Simplified mapping accesses.
2017-12-11 15:04:53 +01:00