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SysAD: "value" => "data".

master
Nabile Rahmani 2018-06-09 18:31:15 +02:00
parent a7972ebc0a
commit 40d0944418
12 changed files with 45 additions and 45 deletions
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12
DotN64/CPU/VR4300/VR4300.cs
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@ -336,24 +336,24 @@ namespace DotN64.CPU
}
[MethodImpl(MethodImplOptions.AggressiveInlining)]
private void Write(ulong address, ulong value, AccessSize size)
private void Write(ulong address, ulong data, AccessSize size)
{
var physicalAddress = CP0.Translate(address);
switch (size)
{
case AccessSize.Byte:
WriteSysAD(physicalAddress, (ReadWord(address) & ~((uint)(1 << 8) - 1)) | (byte)value);
WriteSysAD(physicalAddress, (ReadWord(address) & ~((uint)(1 << 8) - 1)) | (byte)data);
break;
case AccessSize.HalfWord:
WriteSysAD(physicalAddress, (ReadWord(address) & ~((uint)(1 << 16) - 1)) | (ushort)value);
WriteSysAD(physicalAddress, (ReadWord(address) & ~((uint)(1 << 16) - 1)) | (ushort)data);
break;
case AccessSize.Word:
WriteSysAD(physicalAddress, (uint)value);
WriteSysAD(physicalAddress, (uint)data);
break;
case AccessSize.DoubleWord:
WriteSysAD(physicalAddress, (uint)(value >> 32));
WriteSysAD(physicalAddress + sizeof(uint), (uint)value);
WriteSysAD(physicalAddress, (uint)(data >> 32));
WriteSysAD(physicalAddress + sizeof(uint), (uint)data);
break;
default:
throw new ArgumentException("Invalid system bus access size.", nameof(size));

2
DotN64/Extensions/MappingEntryExtensions.cs
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@ -25,7 +25,7 @@ namespace DotN64.Extensions
public static uint ReadWord(this IReadOnlyList<MappingEntry> memoryMaps, uint address) => memoryMaps.GetEntry(address).ReadWord(address);
[MethodImpl(MethodImplOptions.AggressiveInlining)]
public static void WriteWord(this IReadOnlyList<MappingEntry> memoryMaps, uint address, uint value) => memoryMaps.GetEntry(address).WriteWord(address, value);
public static void WriteWord(this IReadOnlyList<MappingEntry> memoryMaps, uint address, uint data) => memoryMaps.GetEntry(address).WriteWord(address, data);
#endregion
}
}

2
DotN64/MappingEntry.cs
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@ -35,7 +35,7 @@ namespace DotN64
public uint ReadWord(uint address) => Read(OffsetAddress ? address - StartAddress : address);
[MethodImpl(MethodImplOptions.AggressiveInlining)]
public void WriteWord(uint address, uint value) => Write(OffsetAddress ? address - StartAddress : address, value);
public void WriteWord(uint address, uint data) => Write(OffsetAddress ? address - StartAddress : address, data);
public override string ToString() => $"0x{StartAddress:X8} .. 0x{EndAddress:X8} ({(Read != null ? "R" : string.Empty)}{(Write != null ? "W" : string.Empty)})";
#endregion

4
DotN64/PIF/PeripheralInterface.cs
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@ -42,9 +42,9 @@ namespace DotN64
new MappingEntry(0x1FC007C0, 0x1FC007FF) // PIF (JoyChannel) RAM.
{
Read = o => BitConverter.ToUInt32(RAM, (int)o),
Write = (o, v) =>
Write = (o, d) =>
{
BitHelper.Write(RAM, (int)o, v);
BitHelper.Write(RAM, (int)o, d);
OnRAMWritten((int)o);
}
}

6
DotN64/RCP/AI/RealityCoprocessor.AudioInterface.cs
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@ -31,15 +31,15 @@
{
new MappingEntry(0x04500000, 0x04500003) // AI DRAM address.
{
Write = (o, v) => DRAMAddress = v
Write = (o, d) => DRAMAddress = d
},
new MappingEntry(0x04500004, 0x04500007) // AI length.
{
Write = (o, v) => TransferLength = v
Write = (o, d) => TransferLength = d
},
new MappingEntry(0x0450000C, 0x0450000F) // AI status.
{
Write = (o, v) => rcp.MI.Interrupt &= ~MIPSInterface.Interrupts.AI
Write = (o, d) => rcp.MI.Interrupt &= ~MIPSInterface.Interrupts.AI
}
};
}

8
DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs
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@ -40,9 +40,9 @@ namespace DotN64.RCP
{
new MappingEntry(0x04300000, 0x04300003) // MI init mode.
{
Write = (o, v) =>
Write = (o, d) =>
{
var bits = new BitVector32((int)v);
var bits = new BitVector32((int)d);
var mode = InitMode;
mode.InitLength = (byte)bits[InitModeRegister.InitLengthSection];
@ -68,9 +68,9 @@ namespace DotN64.RCP
},
new MappingEntry(0x0430000C, 0x0430000F) // MI interrupt mask.
{
Write = (o, v) =>
Write = (o, d) =>
{
var mask = (InterruptMaskWrites)v;
var mask = (InterruptMaskWrites)d;
void Clear(InterruptMaskWrites clearMask, Interrupts interrupt)
{

20
DotN64/RCP/PI/RealityCoprocessor.ParallelInterface.cs
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@ -43,9 +43,9 @@ namespace DotN64.RCP
new MappingEntry(0x04600010, 0x04600013) // PI status.
{
Read = o => (uint)Status,
Write = (o, v) =>
Write = (o, d) =>
{
var status = (StatusWrites)v;
var status = (StatusWrites)d;
if ((status & StatusWrites.ResetController) != 0) { /* TODO. */ }
@ -55,33 +55,33 @@ namespace DotN64.RCP
},
new MappingEntry(0x04600014, 0x04600017) // PI dom1 latency.
{
Write = (o, v) => Domains[0].Latency = (byte)v
Write = (o, d) => Domains[0].Latency = (byte)d
},
new MappingEntry(0x04600018, 0x0460001B) // PI dom1 pulse width.
{
Write = (o, v) => Domains[0].PulseWidth = (byte)v
Write = (o, d) => Domains[0].PulseWidth = (byte)d
},
new MappingEntry(0x0460001C, 0x0460001F) // PI dom1 page size.
{
Write = (o, v) => Domains[0].PageSize = (byte)v
Write = (o, d) => Domains[0].PageSize = (byte)d
},
new MappingEntry(0x04600020, 0x04600023) // PI dom1 release.
{
Write = (o, v) => Domains[0].Release = (byte)v
Write = (o, d) => Domains[0].Release = (byte)d
},
new MappingEntry(0x04600000, 0x04600003) // PI DRAM address.
{
Write = (o, v) => DRAMAddress = v & ((1 << 24) - 1)
Write = (o, d) => DRAMAddress = d & ((1 << 24) - 1)
},
new MappingEntry(0x04600004, 0x04600007) // PI pbus (cartridge) address.
{
Write = (o, v) => PBusAddress = v
Write = (o, d) => PBusAddress = d
},
new MappingEntry(0x0460000C, 0x0460000F) // PI write length.
{
Write = (o, v) =>
Write = (o, d) =>
{
WriteLength = v & ((1 << 24) - 1);
WriteLength = d & ((1 << 24) - 1);
Status |= Statuses.DMABusy;
var maps = rcp.MemoryMaps;

12
DotN64/RCP/RI/RealityCoprocessor.RDRAMInterface.cs
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@ -23,24 +23,24 @@
new MappingEntry(0x0470000C, 0x0470000F) // RI select.
{
Read = o => Select,
Write = (o, v) => Select = (byte)(v & (1 << 3) - 1)
Write = (o, d) => Select = (byte)(d & (1 << 3) - 1)
},
new MappingEntry(0x04700004, 0x04700007) // RI config.
{
Write = (o, v) => Config = v
Write = (o, d) => Config = d
},
new MappingEntry(0x04700008, 0x0470000B) // RI current load.
{
Write = (o, v) => { /* TODO: Any write updates current control register. */ }
Write = (o, d) => { /* TODO: Any write updates current control register. */ }
},
new MappingEntry(0x04700000, 0x04700003) // RI mode.
{
Write = (o, v) => Mode = v
Write = (o, d) => Mode = d
},
new MappingEntry(0x04700010, 0x04700013) // RI refresh.
{
Read = a => Refresh,
Write = (a, v) => Refresh = v
Read = o => Refresh,
Write = (o, d) => Refresh = d
}
};
}

2
DotN64/RCP/SI/RealityCoprocessor.SerialInterface.cs
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@ -17,7 +17,7 @@
new MappingEntry(0x04800018, 0x0480001B) // SI status.
{
Read = o => (uint)Status,
Write = (o, v) => Status &= ~Statuses.Interrupt
Write = (o, d) => Status &= ~Statuses.Interrupt
}
};
}

8
DotN64/RCP/SP/RealityCoprocessor.SignalProcessor.cs
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@ -45,14 +45,14 @@ namespace DotN64.RCP
new MappingEntry(0x04001000, 0x04001FFF) // SP_IMEM read/write.
{
Read = o => BitConverter.ToUInt32(IMEM, (int)o),
Write = (o, v) => BitHelper.Write(IMEM, (int)o, v)
Write = (o, d) => BitHelper.Write(IMEM, (int)o, d)
},
new MappingEntry(0x04040010, 0x04040013) // SP status.
{
Read = o => (uint)Status,
Write = (o, v) =>
Write = (o, d) =>
{
var status = (StatusWrites)v;
var status = (StatusWrites)d;
void Clear(StatusWrites clearMask, Statuses value)
{
@ -115,7 +115,7 @@ namespace DotN64.RCP
new MappingEntry(0x04000000, 0x04000FFF) // SP_DMEM read/write.
{
Read = o => BitConverter.ToUInt32(DMEM, (int)o),
Write = (o, v) => BitHelper.Write(DMEM, (int)o, v)
Write = (o, d) => BitHelper.Write(DMEM, (int)o, d)
},
new MappingEntry(0x04080000, 0x04080003) // SP PC.
{

8
DotN64/RCP/VI/RealityCoprocessor.VideoInterface.cs
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@ -26,17 +26,17 @@
{
new MappingEntry(0x0440000C, 0x0440000F) // VI vertical intr.
{
Write = (o, v) => VerticalInterrupt = (ushort)(v & ((1 << 10) - 1))
Write = (o, d) => VerticalInterrupt = (ushort)(d & ((1 << 10) - 1))
},
new MappingEntry(0x04400024, 0x04400027) // VI horizontal video.
{
Write = (o, v) => HorizontalVideo = v
Write = (o, d) => HorizontalVideo = d
},
new MappingEntry(0x04400010, 0x04400013) // VI current vertical line.
{
Write = (o, v) =>
Write = (o, d) =>
{
CurrentVerticalLine = (ushort)(v & ((1 << 10) - 1));
CurrentVerticalLine = (ushort)(d & ((1 << 10) - 1));
rcp.MI.Interrupt &= ~MIPSInterface.Interrupts.VI;
}
}

6
DotN64/RDRAM/RDRAM.cs
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@ -24,7 +24,7 @@ namespace DotN64
new MappingEntry(0x00000000, 0x03EFFFFF) // RDRAM memory.
{
Read = o => BitConverter.ToUInt32(Memory, (int)o),
Write = (o, v) => BitHelper.Write(Memory, (int)o, v)
Write = (o, d) => BitHelper.Write(Memory, (int)o, d)
},
new MappingEntry(0x03F00000, 0x03FFFFFF) // RDRAM registers.
{
@ -41,7 +41,7 @@ namespace DotN64
}
}
},
Write = (o, v) =>
Write = (o, d) =>
{
if (!GetRegisterInfo((uint)o, out var register, out var index))
return;
@ -50,7 +50,7 @@ namespace DotN64
{
fixed (void* pointer = &Configs[index.Value])
{
*((uint*)pointer + register) = v;
*((uint*)pointer + register) = d;
}
}
}