Commit Graph

81 Commits (master)

Author SHA1 Message Date
Nabile Rahmani a4d06cef67 Handle special cases for CP0 register writes.
- The timer interrupt is cleared on writes to the Compare register (see: #6.3.4).
- Only software interrupt bits are writable into the Cause register (see: #6.3.6).
2018-12-24 21:38:18 +01:00
Nabile Rahmani bb4d756ebb Step out should step over other linked jumps. 2018-12-24 17:29:06 +01:00
Nabile Rahmani 0753fbce9b - Blank the screen on invalid video state.
- Name the CPU thread.
2018-12-24 17:13:27 +01:00
Nabile Rahmani ac64a2d0c4 Debugger: Added step out and step over. 2018-12-24 17:03:47 +01:00
Nabile Rahmani 124567fd71 The CPU is in kernel mode when EXL or ERL is on.
This would fix the User and Supervisor modes entering an exception and being unable to service it as they have no way to return to Kernel mode.
The CPU would get stuck in a coprocessor unusable exception loop servicing or exiting it.

See VR4300 user manual #6.4.1, or #6.3.5, Operating Modes.
2018-12-22 00:28:05 +01:00
Nabile Rahmani c89a91449e Set the MI version register to RCP v2.0. 2018-12-21 23:32:17 +01:00
Nabile Rahmani 78d7002396 Interrupt maps. 2018-12-19 17:35:54 +01:00
Nabile Rahmani d2e3ddff14 Fixed incorrect masking for sub-word writes. 2018-12-19 15:43:20 +01:00
Nabile Rahmani 719107d459 Renames. 2018-12-11 20:47:19 +01:00
Nabile Rahmani 7b9ad33be2 Fixed SI interrupts and moved memory maps. 2018-12-11 20:36:16 +01:00
Nabile Rahmani 6fc595dc27 More readable device states. 2018-12-11 20:01:04 +01:00
Nabile Rahmani ca014d07d6 Inline exception processing methods. 2018-12-11 19:39:32 +01:00
Nabile Rahmani af652e45b4 Name the interrupt pins. 2018-12-11 19:38:35 +01:00
Nabile Rahmani dcf1766d73 Make the CPU SB/SH tests pass.
Implemented the LH opcode.

Something isn't quite right, as not all cases were fixed (RDP hello world works, but I8RLEVideo, I8VideoDecode and a few others still aren't totally right). Also, some games still incorrectly set the User mode among other bits in the status register.
2018-12-10 19:59:20 +01:00
Nabile Rahmani a532f4945d DllMapping isn't required when following naming conventions.
https://www.mono-project.com/docs/advanced/pinvoke/#library-names
2018-11-29 09:25:10 +01:00
Nabile Rahmani 6c1253392e Hello, Angrylion RDP. 2018-11-29 05:26:46 +01:00
Nabile Rahmani 48924bdfba Handle endianness on sub-word CPU reads (fixes garbled text on test ROMs).
- Added SD opcode for running some test ROMs.
- Quit the debugger when the N64 is powered off.
2018-11-29 04:39:23 +01:00
Nabile Rahmani 585645d791 Somewhat fixed the SDL implementation (frame buffer scaling, hanged on Windows, did not gracefully quit everywhere).
- Blitting the frame buffer works for 240p and 480p, though due to the usage of the scale-up values, some lines don't make it through in 480p. Additionally, something is wrong with 16-bit buffers.
- Running the window thread on the main thread since the main thread created the window. Windows isn't able to poll SDL events on a different thread.
- Disposing the SDL window on the thread which created it instead of relying on the finaliser to destroy it. Not doing so triggers a segfault as DestroyRenderer gets called. No need to destroy textures when disposing of the renderer as it does it.
- Display string for Point struct.
2018-11-29 04:17:35 +01:00
Nabile Rahmani f05442bb40 Format CP0 instructions in its own function. 2018-11-29 04:08:17 +01:00
Nabile Rahmani 6132f8ec15 Compacted CP0 operation dictionaries. 2018-11-29 04:05:19 +01:00
Nabile Rahmani 284291774c Debugger: label add <name> [address] 2018-11-21 17:41:50 +01:00
Nabile Rahmani 6e8ff81e58 Ensure mapping entry fields are set to sane values. 2018-11-21 17:30:21 +01:00
Nabile Rahmani 18c8b8d041 Fixed branching comparisons not being signed.
Previously, it would cause infinite looping when iterating a value downwards, as the code relied on underflow logic to eventually return true in comparisons. With unsigned numbers, that would never occur.

Specifically, some ROMs iterate the TLB index down and used a BGEZ opcode.
2018-11-21 17:11:12 +01:00
Nabile Rahmani 84f14de487 Fixed ROM header fields, and added an option to display headers.
MediaFormat values were guesses from various games (i.e. SM64 is a regular cartridge, OoT was to be expanded, and 64dd.org disk ID listings).
2018-11-21 16:05:28 +01:00
Nabile Rahmani 10470e40b1 - Read zipped ROM images.
- Change window title on cartridge swap.
2018-10-27 08:06:24 +02:00
Nabile Rahmani 9157ead6bb Localise cartridge map (also prevents MonoDevelop's debugger from crashing). 2018-07-05 21:27:32 +02:00
Nabile Rahmani 58a454f112 First pass on video output.
- Added SDL video output.
- Send VI interrupts when the currently scanned line hits the interrupt register's.
- Added some program options related to video.
2018-06-27 16:12:46 +02:00
Nabile Rahmani 34dfe21c05 Handle cartridge swap events by updating the memory map. Reduces branching and calls. 2018-06-27 16:08:45 +02:00
Nabile Rahmani f9f2cd0250 Fixed casting on LD. 2018-06-21 20:47:29 +02:00
Nabile Rahmani 1d65c968e5 Fixed invalid casting on SRL. 2018-06-19 19:17:29 +02:00
Nabile Rahmani 03b71a6b94 Removed unused version property. 2018-06-17 10:02:32 +02:00
Nabile Rahmani dade03d7f7 CPUADD wants these. 2018-06-17 07:47:39 +02:00
Nabile Rahmani 83f573764b VI registers. 2018-06-16 13:59:56 +02:00
Nabile Rahmani e681227e27 - Fixed field masks for device state flags.
- Boot from expansion port if no cartridge is present.
2018-06-14 20:24:19 +02:00
Nabile Rahmani 4d594a6637 Turn DotN64 into a library, reference it and SDL2 for the desktop project. 2018-06-11 19:51:06 +02:00
Nabile Rahmani 5f868004b7 RCP: Reordered and shortened memory maps. 2018-06-10 17:46:20 +02:00
Nabile Rahmani 575f68c549 Debugger: surround register contents with brackets. 2018-06-10 17:33:54 +02:00
Nabile Rahmani 6550d7d327 More country codes. 2018-06-09 20:21:54 +02:00
Nabile Rahmani a13aa374d3 Instruction: FromOpCode => From. 2018-06-09 18:56:57 +02:00
Nabile Rahmani 9762d813ba Ensure GPR[0] is zero. 2018-06-09 18:35:33 +02:00
Nabile Rahmani 40d0944418 SysAD: "value" => "data". 2018-06-09 18:31:15 +02:00
Nabile Rahmani a7972ebc0a Replaced CP0 register index abstract property by a readonly field. 2018-06-09 18:17:06 +02:00
Nabile Rahmani c15c1d0b18 Fixed exceptions not setting the correct branch delay value. 2018-06-09 18:10:39 +02:00
Nabile Rahmani eb41337dce CPU: refactored control flow and load/store methods, added new ops. 2018-06-09 17:40:52 +02:00
Nabile Rahmani dca7725258 Refactored CP0 stuff. 2018-06-05 20:44:13 +02:00
Nabile Rahmani 05cf22619a Mapping entry formatting. 2018-06-05 17:32:59 +02:00
Nabile Rahmani 17e13ce564 FPU:
- Removed duplicate condition signal variable.
- Check for the unimplemented operation flag.
2018-06-05 17:19:02 +02:00
Nabile Rahmani be7b7c9827 Refactored flags and renamed registers. 2018-05-11 16:16:54 +02:00
Nabile Rahmani ecab40e39e Added ops. 2018-01-24 17:21:08 +01:00
Nabile Rahmani a60f8a7dbf SLT comparison is *signed*, duh. 2018-01-24 16:31:36 +01:00