From af652e45b4ebcd75425f4f5117d0bb38eacec59d Mon Sep 17 00:00:00 2001
From: Nabile Rahmani <nabile13.pc@gmail.com>
Date: Tue, 11 Dec 2018 19:36:26 +0100
Subject: [PATCH] Name the interrupt pins.

---
 DotN64/DotN64.csproj                          |  1 +
 ...Coprocessor.MIPSInterface.InterruptPins.cs | 23 +++++++++++++++++++
 .../MI/RealityCoprocessor.MIPSInterface.cs    |  8 ++-----
 3 files changed, 26 insertions(+), 6 deletions(-)
 create mode 100644 DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.InterruptPins.cs

diff --git a/DotN64/DotN64.csproj b/DotN64/DotN64.csproj
index acf1b10..0dbdc43 100644
--- a/DotN64/DotN64.csproj
+++ b/DotN64/DotN64.csproj
@@ -104,6 +104,7 @@
     <Compile Include="VideoFrame.cs" />
     <Compile Include="Switch.cs" />
     <Compile Include="RCP\DP\RealityCoprocessor.DisplayProcessor.Angrylion.cs" />
+    <Compile Include="RCP\MI\RealityCoprocessor.MIPSInterface.InterruptPins.cs" />
   </ItemGroup>
   <ItemGroup>
     <Folder Include="CPU\" />
diff --git a/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.InterruptPins.cs b/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.InterruptPins.cs
new file mode 100644
index 0000000..b1e181f
--- /dev/null
+++ b/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.InterruptPins.cs
@@ -0,0 +1,23 @@
+namespace DotN64.RCP
+{
+    public partial class RealityCoprocessor
+    {
+        public partial class MIPSInterface
+        {
+            [System.Flags]
+            public enum InterruptPins : byte
+            {
+                /// <summary>RCP interrupt asserted.</summary>
+                RCP = 1 << 0,
+                /// <summary>A peripherial has generated an interrupt.</summary>
+                Cartridge = 1 << 1,
+                /// <summary>User has pushed reset button on console.</summary>
+                PreNMI = 1 << 2,
+                /// <summary>Indy has read the value in the RDB port.</summary>
+                RDBRead = 1 << 3,
+                /// <summary>Indy has written a value to the RDB port.</summary>
+                RDBWrite = 1 << 4
+            }
+        }
+    }
+}
diff --git a/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs b/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs
index d39dca6..b6aa708 100644
--- a/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs
+++ b/DotN64/RCP/MI/RealityCoprocessor.MIPSInterface.cs
@@ -8,10 +8,6 @@ namespace DotN64.RCP
     {
         public partial class MIPSInterface : Interface
         {
-            #region Fields
-            private const byte InterruptPin = 1 << 0;
-            #endregion
-
             #region Properties
             private VR4300 CPU => rcp.nintendo64.CPU;
 
@@ -113,9 +109,9 @@ namespace DotN64.RCP
             private void UpdateInterrupt()
             {
                 if ((Interrupt & InterruptMask) != 0)
-                    CPU.Int |= InterruptPin;
+                    CPU.Int |= (byte)InterruptPins.RCP;
                 else
-                    CPU.Int &= unchecked((byte)~InterruptPin);
+                    CPU.Int &= (byte)~InterruptPins.RCP;
             }
             #endregion
         }