From 18c8b8d041a1521e11f9c62ebb7cafc6e036718d Mon Sep 17 00:00:00 2001 From: Nabile Rahmani Date: Wed, 21 Nov 2018 17:11:12 +0100 Subject: [PATCH] Fixed branching comparisons not being signed. Previously, it would cause infinite looping when iterating a value downwards, as the code relied on underflow logic to eventually return true in comparisons. With unsigned numbers, that would never occur. Specifically, some ROMs iterate the TLB index down and used a BGEZ opcode. --- DotN64/CPU/VR4300/VR4300.cs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/DotN64/CPU/VR4300/VR4300.cs b/DotN64/CPU/VR4300/VR4300.cs index 0de9c6d..51257b1 100644 --- a/DotN64/CPU/VR4300/VR4300.cs +++ b/DotN64/CPU/VR4300/VR4300.cs @@ -20,7 +20,7 @@ namespace DotN64.CPU [0b11] = 3.0f }; - private delegate bool BranchCondition(ulong rs, ulong rt); + private delegate bool BranchCondition(long rs, long rt); #endregion #region Properties @@ -290,7 +290,7 @@ namespace DotN64.CPU [MethodImpl(MethodImplOptions.AggressiveInlining)] private bool Branch(Instruction instruction, BranchCondition condition) { - var result = condition(GPR[instruction.RS], GPR[instruction.RT]); + var result = condition((long)GPR[instruction.RS], (long)GPR[instruction.RT]); if (result) Jump(PC + ((ulong)(short)instruction.Immediate << 2));